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NVM

NVM IP Solution

Non-Volatile Memory Solution Optimized for Diverse Product Environments

Coressol provides NVM IP solutions that address a wide range of product environments, including Security · MCU · Automotive · Display · CIS.

Based on Density · Endurance · Power characteristics, we support non-volatile memory designs optimized for each customer's process and product requirements.

NVM PRODUCT LINE-UP

We provide NVM IP in a variety of architectures and applications tailored to product characteristics and process environments.

eMRAM

MRAM-based memory solution for high-reliability and high-density environments
eFlash

NOR Flash-based NVM solution with electrical Erase/Program capability
eOTP

One-Time Programmable Memory optimized for secure programming environments
eFuse

eFuse-based OTP Memory supporting ECID and Secure Code storage
Soft Macro

BIST & Controller solution supporting Memory Test and control functions

eMRAM

Coressol's eMRAM IP is a non-volatile memory solution for Automotive and high-reliability product environments.

Built on a High Density Macro architecture with Multi-Row Redundancy, ECC, and Power Optimization features, it supports eMRAM designs optimized for a wide range of process environments.

MRAM INSTANCE TYPES

Product	Key Features	IP Density
Big Macro	High Density Macro architecture support Multi-Bank architecture support Multi-Row Redundancy (Yield/Vmin Compensation) support Parity Bit IO support for 3-bit ECC Power-Gating Mode support Clock Synchronous Write / Read support	4~16Mb (4Bank, 4Mb/bank, x64IO) 8~64Mb (8Bank, 8Mb/bank, x128IO) 16~128Mb (8Bank, 16Mb/bank, x256IO)

SUPPORTED PROCESS

28nm

Samsung 28nm Process
14nm

Samsung 14nm Process
8nm

Samsung 8nm Process

KEY FEATURES

Read / Write Dual Supply Voltage support
Automotive Grade support (Tj : -40℃ ~ 150℃)
Magnet-resistant design based on eMRAM characteristics
Soft Macro-based Memory Test support
Read / Write Margin design based on Sigma Coverage
Specialty Power Gating support for Power Optimization

eFlash

Coressol's eFlash IP is a Random Access-based non-volatile memory solution that supports high-reliability eFlash designs for Automotive and Industrial environments.

Built on Single-Bank and Multi-Bank architectures with ECC and Redundancy features, it provides eFlash IP optimized for a wide range of product environments.

FLASH INSTANCE TYPES

Product	Key Features	IP Density
Single MAT Macro	SST Design based on ESF3 Cell Single-Bank architecture support Multi-Row Redundancy (Yield/Vmin Compensation) support Parity Bit IO Option support for ECC (YES / NO)	32KB ~ 512KB (1Bank)
Multi MAT Macro	SST Design based on ESF3 Cell Multi-Bank architecture support Multi-Row Redundancy (Yield/Vmin Compensation) support Parity Bit IO Option support for ECC (YES / NO)	1MB ~ 4MB (2~8Bank)

SUPPORTED PROCESS

LNF28LP

Samsung LNF28LP Process
LNF45LS

Samsung LNF45LS Process
65nm ~ 130nm

Samsung 65nm ~ 130nm Process

KEY FEATURES

Read / Program / Erase Dual Supply Voltage support
Automotive / Industrial Grade support (Tj : -40℃ ~ 125℃)
Read / Program / Erase Margin design based on Sigma Coverage

eOTP

Coressol's eOTP IP is a non-volatile One-Time Programmable Memory solution based on a standard CMOS process.

Built on a Secure Programming architecture, it resists Reverse Engineering techniques such as Voltage Contrast and Hot Spot Detection, and supports high-reliability OTP designs optimized for Industrial and Automotive environments.

OTP INSTANCE TYPES

Product	Key Features	IP Density
Macro	Single-Bank or 2-Bank architecture support 100% Redundancy (Yield/Vmin Compensation) support Parity Bit IO Option support for ECC (YES / NO)	1Kb ~ 256Kb (supported per process)

SUPPORTED PROCESS

14nm

Samsung 14nm Process
28nm

Samsung 28nm Process
45nm

Samsung 45nm Process
65nm ~ 130nm

Samsung 65nm ~ 130nm Process

KEY FEATURES

Read / Program / Erase Dual Supply Voltage support
Industrial / Automotive Grade support (Tj : -40℃ ~ 125℃ / 150℃)
Read / Program Margin design based on Sigma Coverage
On-board Program support
Reverse Engineering resistance (Voltage Contrast / Hot Spot Detection)

eFuse

Coressol's eFuse IP is an OTP (One-Time Programmable)-based non-volatile memory solution supporting the storage of ECID (Electrical Chip-ID), Repair Memory Address, and Secure Code.

Through a Programmable Memory architecture based on a standard CMOS process, it supports eFuse designs optimized for diverse process environments and Industrial · Automotive products.

eFUSE INSTANCE TYPES

Product	Key Features	IP Density
1D-Type Macro	One-time Electrically Field-Programmable Non-Volatile architecture Program x1 Read x8 ~ x128 support	8b ~ 128b
2D-Type Macro	One-time Electrically Field-Programmable Non-Volatile architecture Program x1 Read x32 support	1Kb ~ 8Kb

SUPPORTED PROCESS

4nm

Samsung 4nm Process
5nm

Samsung 5nm Process
8nm

Samsung 8nm Process
14nm

Samsung 14nm Process

28nm

Samsung 28nm Process
45nm

Samsung 45nm Process
65nm ~ 130nm

Samsung 65nm ~ 130nm Process

KEY FEATURES

Read / Program Dual Supply Voltage support
Industrial / Automotive Grade support (Tj : -40℃ ~ 125℃ / 150℃)
Read / Program Margin design based on Sigma Coverage

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